commit 06470645cac3260a904d9ef8316c94143054bbab
from: Witcher01 <witcher01+github@posteo.net>
date: Sun Aug  1 17:31:42 2021 UTC

extracted variables, fixed indexing for registers

commit - 1f507d0a4020fb4e7670371d6f047ca0ee5d09cd
commit + 06470645cac3260a904d9ef8316c94143054bbab
blob - 317d1913eea524c00014a76d9ebf55b6546cbd7d
blob + 67501a09189ce4ffa3e0898056ecdd97ff27c118
--- src/chip8.rs
+++ src/chip8.rs
@@ -46,6 +46,8 @@ impl Chip8 {
     /// Execute a given instruction.
     pub fn execute(&mut self, instruction: u16) -> Result<(), String> {
         let nnn = instruction & 0x0FFF;
+        let kk = (instruction & 0x00FF) as u8;
+        let x = (instruction & 0x0F00) >> 8;
 
         match instruction & 0xF000 {
             0x0 => match nnn {
@@ -78,28 +80,22 @@ impl Chip8 {
             },
             // SE
             0x3 => {
-                let reg = instruction & 0x0F00;
-                let byte = (instruction & 0x00FF) as u8;
-
-                // skip next instruction if Vx == byte
-                if self.regs[reg as usize] == byte {
+                // skip next instruction if Vx == kk
+                if self.regs[x as usize] == kk {
                     self.pc += 4;
                 } else {
                     self.pc += 2;
                 }
             },
             // SNE
-            0x4 {
-                let reg = instruction & 0x0F00;
-                let byte = (instruction & 0x00FF) as u8;
-
-                // skip next instruction if Vk != byte
-                if self.regs[reg as usize] != byte {
+            0x4 => {
+                // skip next instruction if Vk != kk
+                if self.regs[x as usize] != kk {
                     self.pc += 4;
                 } else {
                     self.pc += 2;
                 }
-            }
+            },
             _ => {
                 return Err(format!("{:#06x}: not an instruction", instruction));
             }